Methods and systems for determining lithography overlay offsets

Abstract

A system for determining lithography overlay offsets is described. The system comprises a first database, a second database, and a controller. The first database stores operation records of lots processed consecutively by an exposure tool, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot L k and a previous lot L k-1 corresponding to products A and B, respectively. The second database stores overlay information of lots corresponding to the products A and B, comprising overlay information D A,X and D B,Y corresponding to X th and y th records of products A and B. The controller determines the overlay offset corresponding to lot L k according to the overlay information D A,X and D B,Y .

Claims

1 . A system of determining lithography overlay offsets, comprising: a first database storing operation records of lots processed consecutively by an exposure tool, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot L k and a previous lot L k-1 corresponding to products A and B, respectively; a second database storing overlay information of lots corresponding to the products A and B, wherein the overlay information comprises overlay information D A,X and D B,Y corresponding to X th and Y th records of the products A and B; and a controller determining an overlay offset corresponding to the lot L k according to the overlay information D A,X and D B,Y . 2 . The system of claim 1 , wherein the overlay information D A,X and D B,Y comprise overlay offsets and processing time corresponding to lots of the products A and B processed by the exposure tool, respectively. 3 . The system of claim 2 , wherein the overlay information D A,X and D B,Y comprise information of product names, a processed layer, an utilized mask, and an exposure tool name corresponding to the lots L k and L k-1 . 4 . The system of claim 1 , wherein the lot L k is scheduled for processing by the exposure tool at time T A,m+1 , and the lot L k-1 is processed at time T B,n , wherein an interval between T A,m+1 and T B,n is less than a first threshold. 5 . The system of claim 4 , wherein the controller retrieves overlay information D A,m corresponding to a latest lot of the product A processed at T A,m by the exposure tool, and retrieves overlay information of the product B processed at time T B,n-j close to T A,m by the exposure tool, with an interval between T B,n-j and T A,m smaller than a second threshold. 6 . The system of claim 5 , wherein the controller retrieves overlay offsets comprised in the overlay information D A,m , D B,n , and D B,n-j , and determines the overlay offset corresponding to the lot L k accordingly. 7 . A method of performing a lithography process, comprising: providing operation records of lots processed consecutively by an exposure tool, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot L k and a previous lot L k-1 corresponding to products A and B, respectively; providing overlay information of lots corresponding to the products A and B, wherein the overlay information comprises overlay information D A,X and D B,Y corresponding to X th and Y th records of the products A and B; and determining an overlay offset corresponding to the lot L k according to the overlay information D A,X and D B,Y . 8 . The method of claim 7 , wherein the overlay information D A,X and D B,Y comprise overlay offsets and processing time corresponding to lots of the products A and B processed by the exposure tool, respectively. 9 . The method of claim 8 , wherein the overlay information D A,X and D B,Y comprise information of product names, a processed layer, an utilized mask, and an exposure tool name corresponding to the lots L k and L k-1 . 10 . The method of claim 7 , wherein the lot L k-1 is processed at time T B,n , the lot L k for processing by the exposure tool is scheduled at time T A,m+1 , and the method further comprises determining whether an interval between T A,m+1 and T B,n is less than a first threshold. 11 . The method of claim 10 , further comprising: retrieving overlay information D A,m corresponding to a latest lot of the product A processed at T A,m by the exposure tool; retrieving overlay information of the product B processed at time T B,n-j close to T A,m by the exposure tool; and determining whether an interval between T B,n-j and T A,m is smaller than a second threshold. 12 . The method of claim 11 , further comprising retrieving overlay offsets comprised in the overlay information D A,m , D B,n , and D B,n-j , and determining the overlay offset corresponding to the lot L k accordingly. 13 . The method of claim 7 , further comprising providing the lot L k before providing the operation records. 14 . The method of claim 7 , further comprising processing the lot L k according to the determined overlay offset. 15 . A semiconductor device processed by the method of claim 14 . 16 . A method of performing a lithography process, comprising: providing a first database storing operation records of lots processed consecutively by an exposure tool, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot L k and a previous lot L k-1 corresponding to products A and B, respectively, wherein the lot L k is scheduled to be processed by the exposure tool at time T A,m+1 , and the lot L k-1 is processed at time T B,n , with an interval between T A,m+1 and T B,n less than a first threshold; providing overlay information of lots corresponding to the products A and B, wherein the overlay information comprises overlay information D A,X and D B,Y corresponding to X th and Y th records of the products A and B; retrieving overlay information D A,m corresponding to a latest lot of the product A processed at T A,m by the exposure tool; retrieving overlay information of the product B processed at time T B,n-j close to T A,m by the exposure tool, and determining whether an interval between T B,n-j and T A,m is smaller than a second threshold; retrieving overlay offsets comprised in the overlay information D A,m , D B,n , and D B,n-j , and determining an overlay offset corresponding to the lot L k accordingly; and processing the lot L k according to the determined overlay offset. 17 . The method of claim 16 , wherein the overlay information D A,X and D B,Y comprise overlay offsets and processing time corresponding to lots of the products A and B processed by the exposure tool, respectively. 18 . The method of claim 16 , wherein the overlay information D A,X and D B,Y comprise information of product names, a processed layer, an utilized mask, and an exposure tool name corresponding to the lots L k and L k-1 . 19 . The method of claim 16 , further comprising providing the lot L k before processing the lot L k according to the determined overlay offset.
BACKGROUND [0001] The invention relates in general to semiconductor lithography, and more specifically to methods and systems of determining overlay offsets to compensate overlay errors in semiconductor lithography processes. [0002] An important feature in semiconductor lithography is overlay, or image placement of one lithographic level relative to another. Overlay errors of one level relative to the prior level thereof are typically broken down into systematic and non-systematic components. The systematic components are typically, for example, X and Y translation, lithographic field X and Y magnification, rotation, and skew. These systematic components are used to generate overlay offsets transferred to the aligner to achieve proper overlay. [0003] Conventionally, there are numerous approaches to achieve good overlay. For loose overlay specifications relative to aligner and process capability, fixed overlay offsets can be used with reasonable success. As specifications tighten, it is necessary to periodically update overlay offsets. [0004] One method of updating offsets is to couple a database with a software data filtering means and averaging algorithm to automatically adjust offsets. Due to either process/aligner variability or aligner shifts, an average of past offsets, no matter how well sorted, is not essentially the optimum predictor of what a current lot requires for substantial overlay accuracy. Additionally, this method assumes homogeneity between the wafers on which the overlay error is measured, and the subsequent wafers are patterned by the exposure tool. As wafer processing techniques change from lot-to-lot control to wafer-to-wafer control, this assumption becomes less valid. A particular wafer, lot, or subset of wafers in a lot may not have identical overlay characteristics with respect to the underlying layers. [0005] Another method for updating offsets is to execute a test run using a test wafer, and to measure overlay errors of the processed test wafer to determine an overlay offset for a subsequent run. This method can typically obtain a more accurate prediction of corresponding overlay offset. Unfortunately, execution of test runs incurs additional cost. SUMMARY [0006] Systems and methods of determining lithography overlay offsets are provided. By determining lithography overlay offsets, some embodiments of systems and methods perform lithography processes achieving higher overlay accuracy. [0007] According to one embodiment of the invention, a system of determining lithography overlay offsets is provided. The system comprises a first database, a second database, and a controller. The first database stores operation records of lots processed consecutively by an exposure tool, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot and a previous lot corresponding to products A and B, respectively. The second database stores overlay information of lots corresponding to the products A and B, comprising overlay information of current lots and that corresponding to processed lots of products A and B. The controller determines the overlay offsets corresponding to the subsequent lot according to the overlay information. [0008] A method of performing a lithography process is also provided. Operation records of lots processed consecutively by an exposure tool are provided, wherein each lot corresponds to a layer of a product, and the operation records pertain to a subsequent lot and a previous lot corresponding to products A and B, respectively. Overlay information of lots corresponding to the products A and B is also provided, which comprises overlay information corresponding to current lots and processed lots of products A and B. The overlay offsets corresponding to the subsequent lot are determined according to the overlay information corresponding to processed lots of products A and B. [0009] The above-mentioned method may take the form of program code embodied in a tangible media. When the program code is loaded into and executed by a machine, the machine becomes an apparatus for practicing the invention. [0010] These disclosed systems and methods are capable of determine lithography overlay offsets. By determining lithography overlay offsets, some embodiments of systems and methods perform lithography processes achieving higher overlay accuracy. Additionally, the overlay offsets are determined according to previous overlay offsets without using a test wafer. DESCRIPTION OF THE DRAWINGS [0011] The invention can be more fully understood by reading the subsequent detailed description and examples with references made to the accompanying drawings, wherein: [0012] FIG. 1 is a schematic view of an embodiment of a lithography system; [0013] FIG. 2 is a schematic view of an embodiment of consecutive operations of an exposure tool; [0014] FIG. 3 illustrates a schematic view showing the arrangement of overlay information in an embodiment of a database; [0015] FIG. 4 illustrates a flowchart of an embodiment of lithography method; [0016] FIG. 5 illustrates overlay information used in FIG. 4 ; and [0017] FIG. 6 illustrates a schematic view showing correlation between overlay offset and process time. DETAILED DESCRIPTION [0018] Embodiments of the invention will now be described with reference to FIGS. 1 to 6 , which in general relate to a lithography system. [0019] FIG. 1 is a schematic view of an embodiment of a lithography system. The lithography system 10 capable of performing consecutive lithography processes comprises an exposure tool 11 , an overlay controller 13 , a tool operation database 15 , a metrology tool 17 , and an overlay database 19 . [0020] Exposure tool 11 consecutively processes wafer lots, wherein each wafer lot corresponds to a particular product layer. Referring to FIG. 2 , exposure tool 11 sequentially processes wafer lots L 1 ˜L 10 , wherein wafer lots L 1 ˜L 9 have been processed, and wafer lot L 10 is scheduled to be processed at a preset time. Operation records of wafer lots L 1 ˜L 9 are sequentially stored in tool operation database 15 according to the time when they are processed. The operation record comprises information pertaining to the processed wafer lot, such as wafer lot ID, process sequential number, process time, and corresponding product ID and layer ID. [0021] Metrology tool 17 measures overlay errors on wafer lots processed by the exposure tool 11 , and stores the measurement in the overlay database 19 . The overlay database 19 stores overlay information including overlay offsets of wafer lots corresponding to different layers of different products. Additionally, the overlay database 19 also stores other information pertaining to processed wafer lots, such as process time, product ID, layer ID, mask information, and exposure tool information. The overlay database 19 comprises overlay information arranged in a multi-level hierarchical order, or the structure as shown in FIG. 3 . Referring to FIG. 3 , overlay record 300 comprises overlay information 34 corresponding to a plurality of wafer lots pertaining to a particular product. In the tree-structure shown in FIG. 3 , product ID 30 serves as the root of overlay record 300 , layer ID 31 is a child node thereof, a mask ID 32 is a child node of the node of layer ID 31 , and exposure tool ID 33 is again a child node of the node of mask ID 32 . The overlay information can be stored in another structure to meet special needs, and is not limited to the described tree-structure herein. [0022] Overlay controller 13 determines the overlay offset of the exposure tool 11 to process the subsequent wafer lot L 10 according to the overlay information stored in the overlay database 19 . [0023] FIG. 4 is a flowchart of lithography method. The lithography method as shown in FIG. 4 can be implemented in a system shown in FIG. 1 , determining overlay offsets and performing lithography processes in the lithography system described above and shown in FIG. 1 . [0024] Referring to FIG. 4 , operation records of wafer lots processed consecutively by an exposure tool are provided (step S 41 ). The exposure tool, for example, a stepper, is capable of processing wafer lots consecutively, wherein each wafer lot corresponds to a particular layer of a product. The wafer lots can be processed in a sequence as shown in FIG. 2 . Referring to FIG. 2 , the exposure tool processes wafer lots L 1 ˜L 10 sequentially, wherein wafer lots L 1 ˜L 9 have been processed, and wafer lot L 10 is scheduled to be process at a preset time. Operation records of wafer lots L 1 ˜L 9 are stored in a tool operation database sequentially according to the time when they are processed. The operation information comprises information pertaining to the processed wafer lot, such as wafer lot ID, process sequential number, process time, product ID, and layer ID. [0025] Overlay information of lots corresponding to different products is also provided (step S 42 ). The overlay information can be stored in an overlay database. The overlay database stores overlay information that includes overlay offsets of wafer lots corresponding to different layers of different products. Additionally, the overlay database further stores other information pertaining to processed wafer lots, such as process time, product ID, layer ID, mask information, and exposure tool information. The overlay database comprises overlay information arranged in a tree-structure as shown in FIG. 3 . Referring to FIG. 3 , overlay record 300 comprises overlay information 34 corresponding to a plurality of wafer lots pertaining to a particular product. In the tree-structure shown in FIG. 3 , product ID 30 serves as the root of overlay record 300 , layer ID 31 is a child node thereof, a mask ID 32 is a child node of the node of layer ID 31 , and exposure tool ID 33 is again a child node of the node of mask ID 32 . The overlay information can be stored in another structure to meet requirements, and is not limited to the described tree-structure. [0026] A current wafer lot, for example, wafer lot L 10 , is provided (step S 43 ). As shown in FIG. 5 , wafer lot L 10 is the 10 th lot in the operation record of the exposure tool, wherein the wafer lot L 10 corresponds to the 5 th layer of product A, and its overlay information is stored as 4 th overlay information (denoted as D A,4 ) in overlay record 54 A of product A. Additionally, wafer lot L 10 is scheduled to be processed at time T A,4 . [0027] The overlay offset corresponding to wafer lot L 10 is then determined. According to the operation record of the exposure tool, an operation record and overlay information corresponding to latest wafer lot processed by the exposure are retrieved (step S 44 ). Referring to FIG. 3 , the latest wafer lot processed by the exposure tool is wafer lot L 9 . Wafer lot L 9 corresponds to the 9 th operation record of the exposure tool, pertaining to the 7 th layer of product B, and is exposed using a mask B at time T B,10 . The overlay information corresponds to wafer lot L 9 is stored as 10 th entry in the overlay record of product B (denoted as D B,10 ). As seen in FIG. 5 , the exposure tool processes wafer lots corresponding-to product B at a frequency higher than wafer lots corresponding to product A. [0028] In step S 45 , it is determined whether the interval between T A,4 and T B,10 is less than a first threshold. The first threshold can be determined according to conditions of the exposure tool. For example, five-days is determined as the first threshold. Within the first threshold, the overlay offset of the exposure tool is considered to be substantially close. FIG. 6 illustrates a schematic view of process time of wafer lots corresponding to products A and B. When the time interval between T A,4 and T B,10 exceeds the first threshold, the overlay offset of the exposure tool may be substantially different at T A,4 and T B,10 . In order to obtain a more accurate prediction of overlay offset at T A,4 , a test run is performed rather than using the out-of-date D B,10 to do the prediction. [0029] The overlay information of a particular wafer lot typically comprises overlay offsets for a plurality of process runs. In order to obtain better prediction of overlay offset at T A,4 , overlay offsets for a plurality of process runs are checked to eliminate extreme values of overlay offsets from overlay information D B,10 (step S 46 ). The checking process can be performed using 3-sigma method or other statistical methods. [0030] In step S 47 , the latest operation record of product A is retrieved from the operation database. In some embodiments, the latest operation record of product A is D A,3 corresponding to a wafer lot processed at T A,3 . An operation record of product B corresponding to a wafer lot processed at a time near the T A,3 is retrieved. In some embodiments, D B,8 is processed at time T B,8 , a process time at most proximity to T A,3 . [0031] In step S 48 , it is determined whether the interval between T A,3 and T B,8 is less than a second threshold. The second threshold can be determined according to conditions of the exposure tool. Within the second threshold, the overlay offset of the exposure tool is considered to be substantially close. FIG. 6 illustrates a schematic view of process time of wafer lots corresponding to products A and B. When the time interval between T A,3 and T B,8 exceeds the second threshold, the overlay offset of the exposure tool may be substantially different at T A,3 and T B,8 . In order to obtain more accurate prediction of overlay offset at T A,4 , out-of-date D B,8 is not used to make the prediction. [0032] When the time interval between T A,3 and T B,8 exceeds the second threshold, other suitable overlay information is searched. In some embodiments, previous overlay information, such as D A,2 , can be retrieved. The overlay information D A,2 corresponds to a wafer lot of product A processed at T A,2 . An operation record of product B corresponding to a wafer lot processed at a time near the T A,2 is retrieved. In some embodiments, D B,4 is processed at time T B,4 , a process time most proximate to T A,2 . Step S 48 is performed to check whether the interval between T A,2 and T B,4 is less than a predetermined threshold. [0033] In order to obtain more accurate prediction of overlay offset at T A,4 , overlay offsets for a plurality of process runs are checked to eliminate extreme values of overlay offsets from overlay information D B,8 (step S 48 ). The checking process can be performed using 3-sigma method or other statistical methods. [0034] In step S 491 , an overlay offset for L 10 is determined. When overlay information D A,3 , D B,10 , and D B,8 meet the aforementioned time threshold criteria and statistical criteria, overlay offsets O A,3 , O B,10 , and O B,8 comprised in the D A,3 , D B,10 , and D B,8 are retrieved, and overlay offset for L 10 is determined accordingly. The overlay offset for L 10 (O A,4 ) can be determined using the following equation: O A,4 =( O B,10 −O B,8 )+O A,3   (1) [0035] In step S 495 , a lithography process is performed according to overlay offset for L 10 (O A,4 ). [0036] In some embodiments, overlay information of product B corresponding to wafer lot L 9 is used to determine overlay offset of wafer lot L 10 . For an exposure tool processing highly variable products, processing time for wafer lots consecutively processed by the exposure tool may be substantially close. For example, processing time for wafer lots L 10 , L 9 , L 8 , and L 7 may be accomplished within three days, which is shorter than the first threshold, i.e. five days. In this case, overlay information of products pertaining to L 9 , L 8 , and L 7 can be used to determine overlay offset of wafer lot L 10 . [0037] For example, in step S 48 , if the time interval between T A,3 and T B,8 exceeds the second threshold, overlay information of products pertaining to wafer lot L 8 can be used to determine overlay offset of wafer lot L 10 . The overlay information corresponding to wafer lot L 8 is processed as in step S 45 through step S 48 . [0038] While the invention has been described by way of example and in terms of the preferred embodiment, it is to be understood that the invention is not limited to the disclosed embodiments. To the contrary, it is intended to cover various modifications and similar arrangements (as would be apparent to those skilled in the art). Therefore, the scope of the appended claims should be accorded the broadest interpretation so as to encompass all such modifications and similar arrangements. [0039] These disclosed systems and methods are capable of determine lithography overlay offsets. By determining lithography overlay offsets, some embodiments of systems and methods perform lithography processes achieving higher overlay accuracy. Additionally, the overlay offsets are determined according to previous overlay offsets without using a test wafer, which reduces process cost effectively.

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Patent Citations (4)

    Publication numberPublication dateAssigneeTitle
    US-6092031-AJuly 18, 2000Mitsubishi Denki Kabushiki KaishaAlignment correction method and semiconductor device
    US-6405096-B1June 11, 2002Advanced Micro Devices, Inc.Method and apparatus for run-to-run controlling of overlay registration
    US-6697698-B2February 24, 2004Hitachi, Ltd.Overlay inspection apparatus for semiconductor substrate and method thereof
    US-6735485-B1May 11, 2004Taiwan Semiconductor Manufacturing Co., Ltd.Overlay registration correction method for multiple product type microelectronic fabrication foundry facility

NO-Patent Citations (0)

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Cited By (5)

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    US-2006265097-A1November 23, 2006William Roberts, Christopher Gould, Nicholas LoukaLithography method and system with correction of overlay offset errors caused by wafer processing
    US-2010201965-A1August 12, 2010Shin-Rung Lu, Tsai-Fu Ou, Wen-Yao HsiehMethod and System for Improved Overlay Correction
    US-7184853-B2February 27, 2007Infineon Technologies Richmond, LpLithography method and system with correction of overlay offset errors caused by wafer processing
    US-8867018-B2October 21, 2014Taiwan Semiconductor Manufacturing Company, Ltd.Method and system for improved overlay correction
    WO-2008025492-A1March 06, 2008Advanced Micro Devices IncA method and a system for reducing overlay errors within exposure fields by apc control strategies